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Parallel mixed-level simulation of digital circuits using virtual time · Study

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ArticleParallel mixed-level simulation of digital circuits using virtual time

Jack V. Briner1990

Article1990

Parallel mixed-level simulation of digital circuits using virtual time

Jack V. Briner · Gershon Kedem

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Simulation Techniques and Applications Low-power high-performance VLSI design VLSI and FPGA Design Techniques

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1998Optimizing communication in time-warp simulators

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Year1990

Typearticle

Published1990-01-01

Languageen

Citations48

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ShelfSimulation Techniques and Applications

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openalex_workW1573570484

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