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A number of quality control and yield improvement techniques are used in the Hewlett Packard Fort Collins IC wafer fabrication line. Four of these are described, with examples of how each has improved quality and yield. Silicon wafer measurements obtained from the vendor or made at incoming inspection are correlated with device parameters and chip yield. Control charts on the manufacturing line are generated online from monitor wafer data entered by operators, giving immediate feedback. In addition, a daily summary report lists any chart out of control. In certain instances it is necessary to improve the process capability of an operation. A feedback technique is used to do this for operations which have predictable systematic drift. Individual wafer positions in critical operations are automatically recorded through the fabrication line. This greatly facilitates correlation of input to output parameters and pinpoints the root cause of physical, device parameter, or chip yield fluctuations. Rapid correlation of the data obtained throughout the fabrication and wafer test areas is done with a common database and tools which transform the raw data into an optimum form for analysis.>
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